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super sequencer? and monitor prelim inary technical data adm1068 rev. pr b in fo rmation furn ished by an alog d e v i c e s is believed to be accurate and reliable. how e ver, n o resp on sibili ty is assume d b y a n alog de vices fo r its use, nor for an y i n fri n geme nt s of p a t e nt s or ot h e r ri ght s o f th ird parties th at may result fro m its use . s p ecificatio n s subj ec t to ch an g e witho u t n o tice. no licen s e is g r an te d by implicati o n or ot herwi s e u n der a n y p a t e nt or p a t e nt ri ghts of analog de v i ces. trademarks an d registered tra d ema r ks are the prop erty o f their respective ow ners. one technolog y way, p.o . box 9106, norwood, ma 02062-9106, u.s.a. t e l: 781. 329. 4 700 www.analog.com fax: 781. 326. 87 03 ? 2004 analog de vices, i n c. al l r i ght s r e ser v ed . features complete supe rvisory and seq u encing soluti on for up to 8 supplies 8 supply faul t detectors enable super v ision of supplies to better than 1% accuracy 4 selectable in put attenuators allow super v i sion: supplies up to 14.4 v on vh supplies up to 6 v on vp1C3 4 du al-f unction inputs, vx 1C 4 high impedance input to supp ly fa ult detector with thresholds bet w een 0.573 v a n d 1.37 5 v general-purpo s e logic input 8 programmable output drive r s (pdo1C8): open collector with external p u ll- up push/pull o u tp ut, dri v en to v ddca p o r vpn o p en co llecto r with weak pul l - u p to vd dcap o r vpn internally char ge-pumped hi gh drive for us e with external n-fet (pdo1C6 only) sequencing en gine (se) imple m ents state m a chine control of pd o ou tpu t s: state changes conditional on input events enables complex control of boards power-up and power-do wn sequ ence control fault e v ent ha ndling interrupt generation on warnings watchdog function can be integrated in se program software control of sequencing thr o ugh smbus device po were d by the highest o f vp1C3, vh fo r impro v ed redundancy user eeprom: 256 byte s industry-st a ndard 2-wir e bus i n terface (smbus) guarantee d p d o lo w with vh, vpn = 1.2 v 32-lea d 7 mm 7 mm lqfp package func tio n a l block di agram 04734-001 pdo7 pdo8 pdognd vdd arbitrator gnd vx1 vx2 vx3 vx4 vp1 vp2 vp3 vh agnd v ddca p programmable reset generators (sfds) dual- function inputs (logic inputs or sfds) sequencing engine configurable output drivers (hv capable of driving gates of n-channel fet) configurable output drivers (lv capable of driving logic signals) pdo1 pdo2 pdo3 pdo4 pdo5 pdo6 sda scl a1 a0 smbus interface refout refgnd vref eeprom adm1068 fi g u r e 1 . applic ati o ns central office s y stems servers/router s multivoltage s y stem lin e cards dsp/fpga s u p p ly seq u encing in-circuit testin g of margined supplies general description the ad m1068 is a co nf igura b l e s u p e r v is o r y/s e q u en c i n g de vice t h a t o f fers a sing le-chi p s o l u t i on fo r su p p ly m o ni to r i n g and s e qu e n c i ng i n m u l t i p l e su p p ly s y ste m s . ( c ont i nu e d on pag e 3 )
adm1068 preliminary technical data rev. prb | page 2 of 28 table of contents general description ......................................................................... 3 specifications ..................................................................................... 4 pin configuration and function descriptions ............................. 6 absolute maximum ratings ............................................................ 7 thermal characteristics .............................................................. 7 esd caution .................................................................................. 7 typical performance characteristics ............................................. 8 powering the adm1068 ................................................................ 10 inputs ................................................................................................ 11 supply supervision ..................................................................... 11 programming the supply fault detectors ............................... 11 input comparator hysteresis .................................................... 12 input glitch filtering ................................................................. 12 supply supervision with vxn inputs ....................................... 12 vxn pins as digital inputs ........................................................ 13 outputs ............................................................................................ 14 supply sequencing through configurable output drivers .. 14 sequencing engine ......................................................................... 15 overview ...................................................................................... 15 war n i ng s ...................................................................................... 15 smbus jump/unconditional jump .......................................... 15 sequencing engine application example ............................... 16 sequence detector ...................................................................... 17 monitoring fault detector ........................................................ 17 timeout detector ....................................................................... 17 fault reporting ........................................................................... 17 applications diagram .................................................................... 18 communicating with the adm1068 ........................................... 19 configuration download at power-up ................................... 19 updating the configuration ..................................................... 19 updating the sequencing engine ............................................. 20 internal registers ........................................................................ 20 eeprom ..................................................................................... 20 serial bus interface ..................................................................... 20 write operations ........................................................................ 22 read operations ......................................................................... 24 outline dimensions ....................................................................... 26 ordering guide .......................................................................... 26 revision history 11/04preliminary prb: preliminary version
prelim inary technical data adm1068 rev. pr b | page 3 of 28 gene ral description ( c ont i nu e d f r om p a g e 1 ) the de v i ce p r o v ides u p t o eig h t p r og ra mma b l e i n p u ts fo r mon i tor i ng u n d e r , ove r , or out - of - w i n d o w f a u l t s on up to e i g h t s u p p lies. i n addi t i o n , eig h t p r og ra mma b l e o u t p u t s can b e us e d as log i c ena b les. six o f t h em can als o p r o v ide u p t o a 12 v o u t p ut fo r dr i v i n g t h e g a te o f an n - cha n nel f e t , w h ich ca n b e p l ace d in t h e p a th o f a s u p p l y . the log i cal co r e o f t h e de vi ce is a s e q u e n ci n g eng i n e . this s t a t e- machi n e - b a s e d co n s t r uc t i o n p r o v ides u p t o 63 dif f er en t s t a t es. this desig n enab les v e r y f l e x i b le s e q u en cing o f th e o u t p u t s, b a s e d o n t h e con d i t ion o f t h e i n p u ts. t h e devi ce i s co n t r o ll ed via co nf i g ura t i o n d a ta t h a t ca n be p r og ra mm e d in t o a n eepro m. the w h ole co nf igura t io n can b e p r og ra mm e d usin g a n in t u i t i v e gui-b a s e d s o f t wa r e p a cka g e p r o v ided b y adi. 04734-002 gpi signal conditioning sfd gpi signal conditioning sfd sfd sfd selectable attenuator selectable attenuator device controller osc eeprom sda scl a1 a0 smbus interface adm1068 configurable o/p driver (hv) pdo1 pdo2 pdognd pdo3 gnd pdo4 pdo5 configurable o/p driver (hv) pdo6 configurable o/p driver (lv) pdo7 configurable o/p driver (lv) pdo8 sequencing engine vx2 vx3 vp2 vp3 vh vp1 vx1 agnd vx4 vdd arbitrator vccp reg 5.25v charge pump refout 10 f refgnd vref 10 f 10 f vddcap f i gu r e 2 . de tai l e d bl oc k dia g r a m
adm1068 preliminary technical data rev. prb | page 4 of 28 specifications vh = 3.0 v to 14.4 v 1 , vpn = 3.0 v to 6.0 v 1 , t a = ?40c to +85c, unless otherwise noted. table 1. parameter min typ max unit test conditions/comments power supply arbitration vh, vpn 3.0 v minimum supply required on one of vpn, vh vp 6.0 v maximum vddcap = 5.1 v, typical vh 14.4 v vddcap = 4.75 v vddcap 2.7 4.75 5.4 v regulated ldo output c vddcap 10 f minimum recommended decoupling capacitance power supply supply current, i vh , i vpn 4.2 6 ma vddcap = 4.75 v, pdo1C8 off additional currents all pdo fet drivers on 1 ma vddcap = 4.75 v, pdo1C6 loaded with 1 a each, pdo7C8 off current available from vddcap 2 ma maximum additional load that can be drawn from all pdo pull-ups to vddcap eeprom erase current 10 ma 1 ms duration only, vddcap = 3 v supply fault detectors vh pin input attenuator error 0.05 % midrange 0.05 % high range detection ranges high range 6 14.4 v midrange 2.5 6 v vpn pins input attenuator error 0.1 % low range and midrange detection ranges midrange 2.5 6 v low range 1.25 3 v ultralow range 0.573 1.375 v no input attenuation error vx pins input impedance 1 m? detection ranges ultralow range 0.573 1.375 v no input attenuation error absolute accuracy 1 % vref error + dac nonlinearity + comparator offset error threshold resolution 8 bits digital glitch filter 0 s mi nimum programmable filter length 100 s maximum programmable filter length reference output reference output voltage 2.043 2.048 2.053 v no load load regulation ?0.25 mv sourcing current, i dacnmax = ?100 a 0.25 mv sinking current, i dacnmax = 100 a minimum load capacitance 1 f capaci tor required for decoupling, stability load regulation 2 mv per 100 a psrr 60 db dc
preliminary technical data adm1068 rev. prb | page 5 of 28 parameter min typ max unit test conditions/comments programmable driver outputs high voltage (charge pump) mode (pdo1C6) output impedance 500 k? v oh 11 12.5 14 v i oh = 0 10.5 12 13.5 v i oh = 1 a i outavg 20 a 2 v < v oh < 7 v standard (digital output) mode (pdo1C8) v oh 2.4 v v pu (pull-up to vddcap or v pn ) = 2.7 v, i oh = 0.5 ma 4.5 v v pu to v pn = 6.0 v, i oh = 0 ma v pu ? 0.3 v v pu 2.7 v, i oh = 0.5 ma v ol 0 0.50 v i ol = 20 ma i ol 2 20 ma maximum sink current per pdo pin i sink 2 60 ma maximum total sink for all pdos r pull-up 20 k? internal pull-up i source (vpn) 2 2 ma current load on any vpn pull- ups, that is, total source current available through any number of pdo pull-up switches configured onto any one three-state output leakage current 10 a v pdo = 14.4 v oscillator frequency 90 100 110 khz all on-chi p time delays derived from this clock digital inputs (vxn, a0, a1) input high voltage, v ih 2.0 v maximum v in = 5.5 v input low voltage, v il 0.8 v maximum v in = 5.5 v input high current, i ih ?1 a v in = 5.5 v input low current, i il 1 a v in = 0 input capacitance 5 pf programmable pull-down current, i pull-down 20 a vddcap = 4.75, t a = 25c, if known logic state is required serial bus digital inputs (sda, scl) input high voltage, v ih 2.0 v input low voltage, v il 0.8 v output low voltage, v ol 2 0.4 v i out = ?3.0 ma serial bus timing clock frequency, f sclk 400 khz bus free time, t buf 4.7 s start setup time, t su;sta 4.7 s start hold time, t hd;sta 4 s scl low time, t low 4.7 s scl high time, t high 4 s scl, sda rise time, t r 1000 s scl, sda fall time, t f 300 s data setup time, t su;dat 250 ns data hold time, t hd;dat 5 ns input low current, i il 1 a v in = 0 sequencing engine timing state change time 10 s 1 at least one of the vh, vp1C3 pins must be 3.0 v to maintain the de vice supply on vddcap. 2 specification is not production tested, but is supported by characterization data at initial product release.
adm1068 prelim inary technical data rev. pr b | page 6 of 28 pin conf iguration and fu nction descriptions 04734-003 1 24 25 32 8 9 17 16 vx1 vx2 vx3 vx4 vp1 vp2 vp3 vh pdo1 pdo2 pdo3 pdo4 pdo5 pdo6 pdo7 pdo8 gnd v ddcap sd a sc l a1 a0 v ccp pdogn d agnd re fgnd nc re fout nc nc nc nc nc = no connect pin 1 indicator adm1068 top view (not to scale) f i gure 3. l q f p p i n c o nfigur ation ta ble 2. pi n f u nct i on d e s c ri pt i o ns pin no. mnemonic description 11, 13-16 nc no connection. 1 C 4 v x 1 C 4 high impedance inputs to supply fa ult detectors. fault thresholds ca n be set from 0.573 v to 1 . 375 v. alternatively, these pin s can be used as general- purpose digital i n puts. 5 C 7 v p 1 C 3 low voltage inputs to supply fault detectors. t h ree input rang es can be set by altering the input attenuation on a potentia l divider connected to these pins, t h e outp ut of which connects to a supply fault detector. these pins allow thresholds from 2.5 v to 6.0 v, 1.25 v to 3.00 v, and 0.5 73 v to 1.375 v. 8 v h high voltage input to supply f a ult detectors. three input rang es can be set by altering the input attenuation on a potential divider connected to this pin, the outp ut of which connects to a s u ppl y fault dete ctor. this pin allows thresholds from 6.0 v to 14.4 v and 2.5 v to 6.0 v. 9 agnd ground return f o r input attenu ators. 10 refgnd ground return for on-chi p reference circuits. 12 refout 2.048 v referen c e output. 1 7 - 2 4 p d o 8 C 1 programmable output d r i v e r s . 25 pdognd ground return f o r output drivers. 26 vccp central charge- p ump voltage of 5.25 v. a reservoir capa citor must be connected between this pi n and gnd. 27 a0 logic input. this pin sets the seve nth bit of the smbus interface address. 28 a1 logic input. this pin sets the si x t h bit of the smbus interface address. 29 scl smbus clock pin . open-drain ou tput requires external resi stive pull-up. 30 sda smbus data i/o pin. open-drain outp ut requires external re sistiv e pull-up. 31 vddcap device supply voltage. linearly regulated from t h e highest of the vp1C3, vh pins to a typical of 4.75 v. 3 2 g n d s u p p l y g r o u n d .
prelim inary technical data adm1068 rev. pr b | page 7 of 28 absolute maximum ratings table 3. p a r a m e t e r r a t i n g voltage on vh pin 16 v voltage on vp pins 7 v voltage on vx p i ns ?0.3 v to +6.5 v input current at any pin 5 ma package input current 20 ma maximum junction temperature (t j max) 150c storage temperature range ?65c to +150c lead temperature, soldering vapor phase, 60 s 215c esd rating, all p i ns 2000 v s t r e s s es a b o v e t h os e lis t e d u n de r a b s o l u t e m a xi m u m r a t i n g s ma y c a us e p e r m a n en t dama ge t o t h e de vice . this is a s t r e s s r a t i ng o n ly ; f u nc t i on a l op e r a t i o n of t h e d e v i c e a t t h e s e or a n y o t h e r con d i t io ns a b o v e t h o s e i ndic a te d i n t h e op er a t io na l s e c t io n o f t h is sp e c if ic a t io n is no t im plie d . e x p o sur e t o a b s o l u te max i m u m ra t i ng co ndi t i on s fo r ex ten d e d p e r i o d s ma y a f fe c t de vice r e l i ab i l i t y . thermal c h aracteristics 32-lead l q fp p a c k a g e: ja = 17c/w esd caution esd (electrostatic discharge) sensitive device. ele c tros tatic charg e s as high as 4000 v readily accumulate on the human body and test eq uipment and can discharge wi thout detection. although this product features proprietary esd protection circu i try, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. theref ore, prop er esd precautions a r e recommended to avoid perform a nce degradation or l o ss of functiona l ity.
adm1068 prelim inary technical data rev. pr b | page 8 of 28 typical perf orm ance cha r acte ristics 6 0 1 2 3 4 5 06 5 4 3 2 1 04734-050 v vp1 (v) v v d dcap (v ) fi g u r e 4 . v vddca p vs . v vp1 6 0 1 2 3 4 5 01 6 14 12 10 8 6 4 2 04734-051 v vh (v) v v ddcap (v ) fi g u r e 5 . v vddca p vs . v vh 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0123456 04734-052 v vp1 (v) i vp1 (ma) fi g u r e 6 . i vp1 vs . v vp1 ( v p1 as su p p ly ) 180 160 140 120 100 80 60 40 20 0 0123456 04734-053 v vp1 (v) i vp1 ( a) fi g u r e 7 . i vp1 vs . v vp1 ( v p1 not as sup p l y ) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 01 6 14 12 10 8 6 4 2 04734-054 v vh (v) i vh (ma) fi g u r e 8 . i vh vs . v vh (v h a s s u p p l y ) 350 300 250 200 150 100 50 0 06 5 4 3 2 1 04734-055 v vh (v) i vh ( a) fi g u r e 9 . i vh vs . v vh (v h n o t a s s u p p l y )
prelim inary technical data adm1068 rev. pr b | page 9 of 28 14 12 10 8 6 4 2 0 0 15.0 12.5 10.0 7.5 5.0 2.5 04734-056 i load current ( a) v pd o1 charge p u mp e d f i g u re 10. v pdo1 (fe t d r i v e mod e ) vs . i lo a d 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 06 5 4 3 2 1 04734-057 i load (ma) v pd o1 (v ) vp1 = 5v vp1 = 3v f i g u re 11. v pdo1 (st r ong p u ll-up vp ) vs . i lo a d 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 06 50 40 30 20 10 04734-058 i load ( a) v pd o1 (v ) 0 vp1 = 5v vp1 = 3v f i g u re 12. v pdo1 ( w eak p u ll-u p t o v p ) v s . i lo a d 2.058 2.038 2.043 2.048 2.053 ?40 ? 20 0 2 0 4 0 6 0 100 80 04734-061 temperature ( c) re fout (v ) vp1 = 3.0v vp1 = 4.75v f i g u re 13. r e fou t v s . t e mpe r at u r e
adm1068 prelim inary technical data rev. pr b | page 10 of 28 powering the adm1068 the ad m1068 is p o w e r e d f r o m the hig h est vol t a g e in p u t o n e i th e r th e posi ti v e - o nl y s u p p l y in p u t s (v p n ) o r th e hi gh v o l t a g e su p p ly in pu t (v h). this t e ch ni q u e o f fers im p r o v e d r e d u ndan c y as the de vic e is n o t dep e n d en t o n an y p a r t ic u l a r v o l t a g e ra il t o k e ep i t o p er a t ional . the s a m e pin s a r e us e d fo r s u p p l y fa u l t d e t e ctio n (d iscus s e d la t e r in t h e n e xt s e ct i o n ) . a vdd a r b i tra t o r o n the device ch o o s e s w h ic h su p p l y t o us e . the a r b i tra t o r ca n be con s ider ed an o r i n g o f f o ur ld o s t o g e ther . a s u p p l y co m p a r a t o r ch o o s e s w h ich o f t h e in p u ts is hig h e s t an d s e le c t s t h is o n e t o p r o v ide t h e o n -chi p s u p p l y . th er e is minimal sw i t ch in g loss wi t h t h is a r ch i t e c t u r e (~0.2 v), r e su l t in g i n t h e a b ili t y t o p o w e r th e ad m1068 f r o m a s u p p l y as lo w as 3.0 v . n o t e tha t t h e s u p p l y o n th e vx n p i n s ca nn ot b e us ed t o p o w e r th e de v i ce . a n e x te r n a l c a p a c i tor to g n d i s re qu i r e d to de c o upl e t h e on- ch i p supply f r om noi s e. th i s c a p a c i tor s h ou l d b e c o n n e c te d to t h e vdd c ap pin, as sh o w n i n f i gur e 14. th e c a p a ci to r h a s anot he r u s e d u r i ng brow nout s ( m o m e n t a r y l o ss of p o we r ) . u n der t h es e con d i t io ns, w h en t h e i n p u t s u p p l y (vp n o r vh) d i ps tra n si en tl y be lo w v dd , t h e s y n c hr on o u s r e c t if ier sw i t ch i m m e d i at e l y t u r n s o f f s o t h at i t d o e s n o t p u l l v dd do wn. t h e v dd ca p ca n t h e n ac t as a r e s e r v o i r t o k e ep t h e de vice ac t i ve un t i l t h e n e xt hi g h est s u p p l y t a k e s o v er t h e p o w e r i n g o f t h e de vice . 10 f is r e co mmen d e d f o r this r e s e r v o i r/deco u p lin g fu n c ti o n . n o t e tha t w h en tw o o r m o r e su p p lies a r e wi thin 100 mv o f eac h o t h e r , th e s u p p ly th a t ta k e s co n t r o l o f v dd fi r s t k e e p s c o n t r o l . f o r exa m p l e , if vp1 is co nn ec t e d t o a 3.3 v su p p l y , th en v dd p o w e rs u p t o a p p r o x ima t e l y 3.1 v thr o ug h vp1. i f vp2 is th en co nnec t e d t o ano t h e r 3.3 v s u p p l y , vp1 s t il l p o w e rs th e de vice , unles s vp2 g o es 100 mv hig h er tha n vp1. supply comparator in en out 4.75v ldo in en out 4.75v ldo in en out 4.75v ldo in en out 4.75v ldo vh vp3 vp2 vp1 vddcap internal device supply 04734-022 f i g u re 14. v dd a r b i t r at or o p er at i o n
prelim inary technical data adm1068 rev. pr b | page 11 of 28 inputs supply su pervision the ad m1068 has eig h t p r og ra mma b l e in p u ts. f o ur o f th es e a r e de di ca te d sup p ly fa u l t dete c t o r s (s f d s). th e s e de di c a te d in p u ts a r e ca l l e d vh and vp1C 3 b y defa u l t. t h e o t h e r fo ur in p u ts a r e lab e le d vx1 C v x 4 and ha ve d u a l f u n c t i o n a l i t y . the y ca n be us e d as ei th er su p p l y fa u l t det e c t o r s, wi t h simila r f u nc t i on a l it y to v h a n d v p 1 C 3 , or c m o s / t t l - c om p a t i bl e log i c in p u ts t o t h e de vices. th eref o r e , th e ad m 1068 ca n ha v e u p t o eig h t a n al og in p u ts, a minim u m o f f o ur a n alog in p u ts and fo ur dig i t a l i n pu ts, o r a com b in a t io n. i f an i n p u t is us e d as an a n alog in p u t, i t ca nn o t be us e d as a dig i tal in p u t. th er ef o r e , a co nf igura t io n re q u ir in g eig h t ana l og in p u ts h a s n o dig i t a l i n p u ts a v ai l a bl e. t a bl e 5 show s t h e d e t a i l s of e a ch of t h e i n put s . 04734- 023 + ? + ? uv comparator vref fault type select ov comparator fault output glitch filter vpn mid low rang e select ultra low f i g u re 15. sup p l y f a ult d e tec t or bl ock programm ing t h e su pply fault detect ors the ad m1068 has u p t o eig h t su p p l y fa u l t det e c t o r s (s fd s) o n i t s eig h t i n p u t cha n n e ls. th es e hig h l y p r og ra mma b l e r e s e t g e n e r a t o rs ena b le t h e su p e r v isi o n o f u p t o eig h t s u p p l y v o l t a g e s . the s u p p lies can b e as lo w as 0. 573 v a nd as hig h as 14.4 v . the in p u ts can b e conf igur e d to dete c t a n u n der v ol t a ge fa u l t (t he in p u t v o l t a g e dro o ps b e lo w a p r ep r o g r a m m e d v a l u e), a n ove r volt age f a u l t ( t he i n put volt age r i s e s ab ove a p r ep r o g r a m m e d val u e) o r a n ou t-o f - w i n do w f a u l t (un d er v o l t a g e or o v er v o l t a g e). the t h r e sh olds ca n b e p r og ra mm e d t o a n 8-b i t r e s o l u t i o n in r e g i s t ers p r o v ided in t h e ad m1068. this tra n s l a t es t o a vol t a g e r e s o l u tion tha t is d e p e nd e n t o n t h e r a ng e s e l e c t e d . the r e s o l u t i o n i s g i ven b y ste p si z e = th r e s h o l d ra nge /255 ther efo r e , if t h e hig h ra n g e is s e le c t e d on vh, t h e st ep size ca n be c a l c ul a t ed a s f o ll o w s : (14.4 v ? 4.8 v)/255 = 37.6 mv t a b l e 4 lis t s t h e u p p e r an d lo w e r limi t o f e a c h a v a i lab l e ra n g e , t h e b o t t om o f e a ch ra n g e ( v b ), a nd t h e ra n g e i t s e lf (v r ). table 4. voltage range limits voltage range (v) v b (v) v r (v) 0.573 to 1.375 0.573 0.802 1.25 to 3.00 1.25 1.75 2.5 to 6.0 2.5 3.5 4.8 to 14.4 4.8 9.6 the t h r e sh old v a l u e r e q u ir e d is g i v e n b y v t = ( v r n )/2 55 + v b w h er e: v t is t h e desir e d t h r e sh old vol t a g e (uv o r o v ) . v r i s t h e vol t age r a nge. n is t h e de ci mal val u e o f t h e 8- b i t co de . v b is th e bot t om o f th e ran g e . r e v e r s i n g th e eq u a ti o n , th e c o d e f o r a d e s i r e d th r e s h o l d i s gi v e n b y n = 255 ( v t ? v b )/ v r f o r exa m ple , if th e us er wan t s t o s e t a 5 v o v t h r e s h old on vp1, t h e co de t o b e pr og ra mm e d in t h e ps1 o v t h r e g i s t er (dis c u s s ed in t h e an-698 a p p l ica t ion n o t e ) is g i v e n b y n = 255 (5 ? 2.5)/3.5 ther efo r e , n = 182 (1011 0110 o r 0xb6). ta ble 5. i nput f u nct i ons , thr e s h olds , a n d r a nges input function voltage range (v) maximum hyst ere sis voltage resolution (mv) glitch filter (s) vh high v analog input 2.5C6.0 425 mv 13.7 0C100 4 . 8 C 1 4 . 4 1 . 1 6 v 3 7 . 6 0 C 1 0 0 vpn positive analog input 0.573C1.375 97.5 mv 3.14 0C100 1 . 2 5 C 3 . 0 0 2 1 2 m v 6 . 8 0 C 1 0 0 2.5C6.0 425 mv 13.7 0C100 vxn high z analog input 0.573C1.375 97.5 mv 3.14 0C100 digital i n p u t 0 C 5 n / a n / a 0 C 1 0 0
adm1068 prelim inary technical data rev. pr b | page 12 of 28 inpu t com p arator h y steresis the uv an d o v co m p a r a t o r s sh own i n f i gur e 15 a r e a l wa y s l o o k i n g at v p n . t o av o i d c h at t e r i n g ( m u l t i p l e t r a n s i t i o n s w h e n t h e i n p u t is v e r y clos e t o t h e s e t t h r e s h old l e v e l ), t h es e com p a r a - t o rs ha v e dig i t a l l y p r og ra mma b l e h y s t er esis. th e h y s t er esis can b e p r og ra mm e d u p t o t h e va l u es s h own i n t a b l e 5. the h y s t er esis is adde d a f t e r a su p p l y v o l t a g e go es o u t o f t o lera n c e . ther efo r e , t h e us er can p r og ra m h o w m u ch ab o v e t h e u v t h re s h ol d t h e i n put m u st r i s e ag ai n b e fore a u v f a u l t i s de as s e r t e d . simi la rl y , t h e us er can p r og ra m h o w m u ch b e lo w t h e o v thr e sh old an in p u t m u s t fal l a g a i n bef o r e an o v fa u l t is de ass e r t e d . the h y s t er esis f i gur e is g i v e n b y v hy s t = v r n thres h /255 w h er e: v hy s t is t h e desi r e d h y st er esis v o l t a g e . n thres h is t h e de cimal val u e o f t h e 5- b i t h y s t er e s is co de . no t e t h a t n thresh has a max i m u m va l u e o f 31. t h e m a x i m u m h y s t er esis fo r t h e ra n g es is lis t e d in t a b l e 5. inpu t glitch filteri n g the f i nal s t a g e o f t h e s f d s is a g l i t ch f i l t er . thi s b l o c k p r o v ides t i m e - d o m ai n f i lte r i n g on t h e output of t h e sf d c o m p ar ator s . this al lo ws th e us er t o r e m o v e a n y s p ur io us tra n si tio n s s u c h as su p p ly b o u n c e a t t u r n -on. t h e g l i t ch f i lte r f u nc t i on is ad di t i on a l t o t h e dig i t a l l y p r og ra mma b l e h y s t er esis o f t h e s f d co m p a r a - t o rs. th e g l i t ch f i l t er tim e o u t is p r og ra mma b l e u p t o 100 s. f o r exa m ple , w h e n t h e g l i t ch f i l t er t i m e o u t is 1 00 s, a n y p u ls es a p p e a r in g o n t h e in p u t o f t h e g l i t ch f i l t er b l o c k t h a t a r e les s t h an 100 s in d u ra tio n a r e p r ev en te d f r o m a p p e a r in g o n t h e o u t p u t o f t h e g l i t ch f i l t er b l o c k. a n y in p u t p u ls e t h a t is lo n g er t h a n 100 s do es a p p e a r o n the o u t p u t o f th e g l i t c h f i l t er b l o c k. th e o u t p ut is dela ye d w i t h r e sp e c t to t h e i n p u t b y 1 00 s. th e f i l t er in g p r o c ess is sh o w n i n f i g u r e 16. 04734-024 t 0 t gf t 0 t gf t 0 t gf t 0 t gf input input pulse shorter than glitch filter timeout input pulse longer than glitch filter timeout output programmed timeout programmed timeout input output f i gur e 1 6 . input gl it c h f i lt e r f u nct i on supply su pervisio n with vxn inputs the vx n in p u ts ha v e tw o f u n c tio n s. th ey c a n b e us ed as ei t h er su p p ly fa u l t dete c t o r s o r dig i t a l log i c in p u ts. w h e n s e le c t e d as a n a n alog (s fd) in p u t, t h e vx n p i n s ha v e ver y simila r f u n c - t i o n ali t y t o t h e vh an d vpn p i n s . th e ma jo r dif f er en ce is t h a t th e vx n p i n s ha v e o n l y o n e in p u t ra n g e: 0.573 v t o 1.375 v . ther efo r e , t h es e in p u t s can dir e c t l y s u p e r v is e onl y t h e v e r y lo w s u p p lies. h o w e ver , t h e in p u t im p e dan c e o f t h e vx n p i n s is hig h , a l l o w i ng a n e x te r n a l re s i stor div i de ne t w ork to b e c o n n e c te d to t h e pin. t h us, a n y su p p ly c a n b e p o te n t ia l l y div i de d down in to t h e in p u t ra n g e o f t h e vx n p i n a nd s u p e r v is e d . this enab les t h e ad m1068 t o mo ni t o r o t h e r s u p p l ies s u c h as +2 4 v , +48 v , a nd ?5 v . a n add i t i ona l s u p p ly su p e r v is i o n f u nc t i on is a v ai l a bl e w h e n t h e v x n p i n s a r e s e lect ed a s d i g i tal i n p u t s . i n th i s ca se , th e a n alog f u n c tion is a v a i l a b l e as a s e con d det e c t o r o n e a ch o f th e dedi- ca ted analog in p u ts, vp1C3 and vh. th e a n al og f u n c tio n o f vx1 is ma p p e d t o vp1, vx2 is ma p p e d t o vp2, a nd s o o n . v x 4 is ma p p e d t o vh. i n t h is c a s e , t h es e s f ds c a n b e vi e w e d as a sec o n d a r y o r w a rn i n g s f d . the s e conda r y s f d s a r e f i xe d to t h e s a m e in put ra n g e as t h e p r ima r y s f d . t h e y a r e us e d t o indic a te wa r n ing le v e l s ra t h er tha n fa il ur e l e v e ls. this al lo ws fa u l ts and wa r n in gs t o be ge ne r a te d on a s i ng l e su p p ly u s i n g on ly one p i n. f o r e x am pl e, if vp1 is s e t t o o u t p u t a fa u l t if a 3.3 v s u p p l y dro o ps t o 3.0 v , vx1 can be s e t t o o u t p u t a wa r n in g a t 3.1 v . w a r n in g o u t p u t s a r e a v a i la b l e fo r r e ad b a ck f r o m t h e st a t us r e g i s t ers. the y a r e als o or e d to get h er a nd fe d i n to t h e s e q u e n cin g e n g i ne (s e), a l l o w i ng w a r n i n g s to ge ne r a te i n te r r upt s on t h e pd os . ther efo r e , in t h e exa m ple ab o v e , if t h e s u p p l y dr o o ps t o 3.1 v , a wa r n in g is ge n e r a te d , a nd r e m e dia l ac t i o n ca n b e t a k e n b e fo r e t h e s u pply d r op s out of to l e r a nc e.
prelim inary technical data adm1068 rev. pr b | page 13 of 28 vxn pi ns as digi tal in puts a s m e n t ion e d p r evio us l y , t h e vx n in p u t p i n s on the ad m1068 h a v e d u al fun c tio n ali t y . th e seco n d fun c ti o n i s a s a di gi tal i n p u t t o th e de vice . th er ef o r e , th e ad m1068 ca n be co nf igur ed f o r u p t o f o ur d i gi tal in p u t s . t h ese in p u t s a r e t t l/cm os- c o m p a ti b l e . s t a nda rd lo g i c sig n a l s ca n b e a pplie d to t h e p i n s : res e t f r o m r e se t g e n e ra t o r s , p w r g o o d s i gn al s , fa ul t f l a g s, m a n u al r e se ts , a nd s o o n . th e s e sig n als a r e a v ai la b l e as in p u ts to t h e s e , an d ca n b e us e d t o c o n t r o l t h e s t a t us o f t h e p d o s . th e i n p u ts can b e co nf igur ed t o det e c t ei th er a c h a n g e in leve l o r a n edge . w h en conf igur e d fo r le vel de te c t io n, t h e ou tp ut o f t h e d i g i t a l b l o c k is a b u f f er e d v e rsio n o f t h e in p u t. w h e n c o nf igur e d fo r e d ge de te c t ion, o n ce t h e lo g i c t r a n si t i on is dete c t e d , a p u ls e o f p r og ra mma b l e wi d t h is o u t p ut f r o m t h e dig i t a l b l o c k. th e wi d t h is p r og ra mma b l e f r o m 0 s t o 100 s. t h e d i g i tal b l ock s f e a t ur e th e sa m e gli t ch f i l t e r f u n c ti o n th a t i s a v a i la b l e on t h e s f d s . this enables t h e us er t o ig n o r e s p ur io us tra n si ti o n s o n t h e in p u t s . f o r e x a m p l e , th e f i l t er ca n be use d t o d e bo un c e a m a n u al r e se t sw i t c h . w h en conf igur e d as dig i t a l i n pu ts, e a ch o f t h e vx n p i n s has a w e ak (10 a) pu l l -do w n c u r r en t s o ur ce a v a i lab l e fo r placin g t h e in p u t in a k n o w n con d i t io n, e v e n if lef t f l o a t i n g . the c u r r en t so u r c e , i f se l e ct e d , w e akl y p u ll s th e in p u t t o g n d . 04734-027 detector vxn (digital input) glitch filter vref = 1.4v to sequencing engine + ? f i gure 1 7 . vxn d i gita l input f u nct i o n
adm1068 prelim inary technical data rev. pr b | page 14 of 28 outputs supply se quencing through configurable outpu t drivers s u p p l y s e q u en c i n g is ac hiev ed wi t h t h e ad m1 068 usin g th e p r og ra mma b l e dr i v er o u t p uts (p d o s) o n t h e de v i ce as con t r o l sig n als fo r s u p p lies. th e ou t p u t dr i v ers ca n be u s e d as log i c ena b les o r as fet dr i v ers. the s e q u e n c e i n w h ich t h e pd o s a r e as s e r t e d (a nd , t h er efo r e , t h e su p p lies a r e t u r n e d o n ) is con t r o l l e d b y t h e s e q u en c i n g en g i n e (s e). the s e det e r m in es wha t ac tio n is to be ta k e n wi t h the pd os bas e d on t h e condi t ion o f t h e in p u ts of t h e ad m106 8. ther efo r e , t h e pd o s can b e s e t u p t o as s e r t w h e n t h e s f d s a r e i n t o l e ra n c e , t h e co rr ect i n p u t s i gn al s a r e r e ce i v ed o n t h e v x n d i g i t a l pi ns , no w a r n i n g s are re c e ive d f r om an y of t h e i n put s of t h e de vice , and s o o n . th e pd os ca n b e us e d for a va r i ety o f f u nc t i ons . t h e pr i m ar y f u nc t i on i s to prov i d e e n abl e s i g n a l s f o r ld o s o r dc/dc co n v er t e rs, whic h g e n e ra te s u p p l ies lo cal l y o n a bo a r d . th e p d os ca n also be us e d t o p r o v id e a po w e r_go od sig n al w h en al l t h e s f d s a r e i n t o lera n c e , o r a r e s e t o u t p u t if one of t h e sf ds go e s out of sp e c i f i c a t i o n ( t h i s c a n b e u s e d a s a st a t us sig n a l fo r a ds p , f p ga, or o t her micr o c on t r ol ler ) . the p d o s can be p r og ra mm e d t o p u l l u p t o a n u m b er o f dif f er en t o p t i o n s. th e ou t p u t s c a n b e p r og ra mm e d as fol l o w s: ? o p en- d ra i n (al l o w in g t h e us er to co nn e c t a n ex t e r n al p u l l -u p re s i stor ) ? ope n -d ra in w i t h w e ak p u ll - u p t o v dd ? pus h /p u l l t o v dd ? ope n -d ra in w i t h w e ak p u ll - u p t o v p n ? pus h /p u l l t o vpn ? st rong pu l l - d ow n to g n d ? i n ter n a l ly cha r ge-p um p e d hig h dr i v e (12 v , pd o1C6 o n ly ) t h e l a st opt i o n ( a v a i l a b l e on ly on pd o 1 C 6 ) a l l o w s t h e u s e r to dir e c t l y dr i v e a v o l t a g e hi g h e n o u g h t o f u l l y enha n c e a n exter n al n-fet , w h ich is us e d t o is ol a t e , fo r exa m ple , a ca r d -side v o lt a g e f r om a b a ck p l ane su p p ly ( a pd o c a n su st ai n g r e a te r t h an 1 0 . 5 v in t o a 1 a lo ad). th e p u l l -do w n s w i t ch es can a l s o be us ed t o dr i v e st a t us le ds dir e c t ly . t h e d a t a d r i v i n g e a ch of t h e p d os c a n c o me f r om on e of t h re e so u r c e s . t h e so u r c e c a n be en a b l e d in t h e p n p d o c fg co nf igura t io n r e g i s t er (s ee t h e an-698 a p p l ic a t io n n o t e f o r det a i l s). the da t a s o ur ce s a r e ? o u tput f r om t h e se . ? dir e c t l y f r o m th e s m b u s. a pd o can be co nf igur ed s o tha t t h e s m bus has dir e c t co n t r o l o v er i t . this ena b les s o f t wa r e co n t r o l o f t h e pd o s . th er efo r e , a micr o c o n t r ol l e r ca n b e us e d t o in i t ia t e a s o f t wa r e p o w e r - u p /p o w er -do w n s e q u e n c e . ? on-chi p clo c k. a 100 kh z c l o c k is g e n e ra ted on the device . this clo c k ca n b e ma de a v a i la ble o n an y o f t h e pd os. i t c a n b e us e d , fo r exa m ple, t o clo c k an ext e r n a l de vic e such as a n led . by defa u l t, t h e p d o s a r e p u l l e d t o gnd b y a w e ak (20 k?) on- c h i p p u l l -down r e sis t o r . this is als o th e con d i t io n o f th e p d o s o n p o w e r - u p , u n t i l t h e co nf igu r a t io n is down l o ade d f r o m eepro m an d t h e p r o g r a m m e d s e t u p is l a tche d. th e o u t p u t s are a c t i vely pu l l e d l o w onc e a s u pply of 1 v or g r e a te r i s on v p n or v h . t h e output s re m a i n h i g h i m p e d a nc e pr i o r to 1 v a p p e ar i n g on v p n or v h . t h i s prov i d e s a k n ow n c o nd it i o n f o r t h e pd os d u r i ng p o w e r - u p . t h e in ter n a l p u l l -d o w n c a n b e o v er dr i v en w i t h a n ext e r n al p u l l - u p o f s u i t ab le v a l u e t i e d f r o m t h e pd o p i n t o t h e r e q u ir e d p u l l -u p v o l t a g e . the 20 k? r e sis t o r m u s t be acco u n t e d f o r in calc u l a t in g a s u i t a b le val u e . f o r e x a m p l e , i f p d on m u s t be p u ll ed u p t o 3 . 3 v , a n d 5 v i s a v a i l a b l e as a n ext e r n al su p p l y , t h e p u l l - u p r e sis t o r val u e is g i v e n b y 3.3 v = 5 v 20 k?/( r up + 20 k?) ther efo r e , r up = (100 k? ? 66 k?)/3.3 = 10 k? 04734-028 pdo se data cfg4 cfg5 cfg6 s mbus dat a clk data 10 ? 20k ? 10 ? 20k ? vp1 sel vp4 10 ? 20k ? v dd v fet (pdo1-6 only) 20k ? f i g u re 18. p r og r a m m ab le d r ive r o u t p ut
prelim inary technical data adm1068 rev. pr b | page 15 of 28 sequenci ng e ngi ne overview the ad m1068 s s e q u en cin g eng i n e (s e) p r o v ides th e us er wi t h p o w e r f u l a n d f l exi b le con t r o l o f s e q u en ci n g . th e s e im ple m e n ts a s t a t e machi n e co n t r o l o f t h e pd o o u t p u t s, wi t h s t a t e cha n g e s co n d i ti o n al o n in p u t ev en t s . s e p r ogra m s ca n en a b l e co m p l e x co n t r o l o f b o a r ds such as p o w e r - u p an d p o w e r - do w n s e q u e n c e co n t r o l, fa u l t e v en t handling, in t e r r u p t gen e ra t i o n o n w a r n in gs, a n d so o n . a w a t c h d og fun c ti o n th a t v e ri f i e s th e co n t in ued o p era t ion o f a pr o c es s o r clo c k c a n b e i n teg r a t e d in t o t h e s e p r ogra m . t h e s e ca n al so be co n t r o ll ed via th e s m b u s , gi v i n g s o f t w a re or f i r m w a re c o n t ro l of t h e b o ard s e qu e n c i ng . the s e s t a t e machine com p r i s e s 63 s t a t e ce l l s. e a ch s t a t e has t h e fol l o w in g a t t r ib u t es: ? m o n i t o r s si gn als i n d i ca tin g th e s t a t us o f th e ei g h t in p u t p i n s , vp1 t o vp3, v h , a nd vx1 t o vx4. ? c a n b e en ter e d f r o m a n y o t h e r st a t e. ? thr e e exi t r o ut e s m o v e t h e s t a t e machi n e on t o a n e xt s t a t e: s e q u e n ce de te c t io n, fa u l t m o ni to r i n g , a nd t i me o u t. ? de la y tim e r s f o r th e se q u en ce a n d tim e o u t b l ock s ca n be p r o g r a mm e d i ndep e n d e n t l y , and cha n ge w i t h e a ch st a t e c h a n g e . th e rang e o f tim e ou ts is f r o m 0 m s t o 400 m s . ? o u t p u t co ndi t i on o f t h e 8 pd o p i n s is def i n e d and f i xe d wi t h in a st a t e . ? t r ans i t i on f r om one s t ate to t h e ne x t i s m a d e i n l e ss t h an 20 s , wh i c h i s t h e tim e n eeded t o d o w n l o a d a s t a t e d e f i ni ti o n f r o m eep r o m t o th e s e . 04734-029 sequence timeout monitor fault state f i g u re 19. st at e ce l l the ad m1068 o f f e rs u p t o 63 s t a t e def i ni tio n s. the sig n als m o n i to r e d to i ndic a te t h e st a t us o f t h e in p u t pins a r e t h e output s of t h e sf ds . warnings the s e a l s o m o ni to rs wa r n i n gs. th e s e wa r n i n gs ca n b e g e n e r a t e d w h e n t h e ad c r e adi n gs viol a t e t h e i r limi t r e g i st er val u e o r w h en t h e s e conda r y v o l t a g e m o ni t o rs o n vp1C3 and v h . t h e w a r n i n g s are a l l or e d to ge t h e r an d are a v ai l a bl e a s a si n g le w a rn i n g in p u t t o ea c h o f th e th r e e b l oc k s th a t e n a b le exi t in g f r o m a st a t e . smbus jump/unconditional jum p the s e c a n b e fo r c e d t o ad v a n c e t o t h e n e xt s t a t e uncon d i t io n- al l y . this ena b le s t h e us er t o fo r c e t h e s e t o ad v a n c e . e x a m ples o f w h er e t h is mig h t b e us e d i n cl ude m o vin g t o a ma rg inin g s t a t e o r deb u g g i n g a s e q u ence . the s m bus j u m p o r g o -t o co mman d can b e s e en as an o t h e r in p u t t o s e q u e n ce an d t i m e out bl o c k s , w h i c h prov i d e a n e x it f r om e a c h st a t e. table 6. sampl e sequence state entries s t a t e s e q u e n c e t i m e o u t m o n i t o r idle1 if vx1 is low , go to state idle2. idle2 if vp1 is okay, g o to state en3v 3. en3v3 if vp2 is okay, g o to state en2v5. if vp2 is not okay after 10 ms, go to state dis3v3. if vp1 is not okay, go to state id le1. dis3v3 if vx1 is high, g o to state idle1. en2v5 if vp3 is okay, g o to state pwrg d. if vp3 is not okay after 20 ms, go to state dis2v5. if vp1 or v p 2 is not okay, go to state fsel2. dis2v5 if vx1 is high, g o to state idle1. fsel1 if vp3 is not okay, go to state di s2v5. if vp1 or v p 2 is not okay, go to state fsel2. fsel2 if vp2 is not okay, go to state di s3v3. if vp1 is not okay, go to state id le1. pwrgd if vx1 is high, g o to state dis2v5. if vp1, vp2, or v p 3 is not okay, go to state fsel1.
adm1068 prelim inary technical data rev. pr b | page 16 of 28 sequencing engine application example the a p plic a t io n in t h is s e c t io n d e m o n s t r a t es t h e o p era t ion o f th e s e . f i gur e 20 s h o w s h o w th e si m p le b u ild i n g b l oc k o f a sin g le s e s t a t e c a n be us ed t o b u ild a p o w e r - u p s e q u en ce f o r a 3 - su p p ly s y ste m . t a b l e 7 lis t s t h e p d o o u t p u t s fo r e a ch s t a t e i n t h e s a me s e im p l em en t a t i o n . i n t h is s y s t em , t h e p r esen ce o f a g o o d 5 v s u p p l y o n v p 1 a n d th e v x 1 p i n h e ld lo w a r e th e tri g g e r s r e q u i r ed f o r a po w e r - u p seq u en ce t o s t a r t . th e seq u en ce in t e n d s t o t u rn o n the 3.3 v su p p l y next, t h en t h e 2. 5 v su p p l y ( a ss u m in g s u cc es s f u l t u r n -on of t h e 3 . 3 v su p p ly ) . o n c e a l l t h re e sup p l i e s are go o d , t h e p w r g d s t a t e is en t e r e d , w h er e t h e s e r e main s un t i l a f a u l t o c c u rs o n o n e of t h e t h r e e s u p p lies, o r i t is in s t r u c t e d t o g o t h r o ug h a p o w e r - do w n s e q u e n c e b y vx1 go in g hig h . f a u l ts a r e deal t wi t h thr o ug h o u t th e p o w e r - u p s e q u en ce on a c a se- b y- ca se bas i s . t h e f o ll o w in g secti o n s , wh ic h d e sc ri be t h e indivi d u a l b l o c ks, us e t h is s a m p le a p plic a t ion to dem o nst r a t e th e sta t e mac h in e s ac tio n s. 04734-030 idle1 idle2 en3v3 dis3v3 dis2v5 pwrgd fsel1 fsel2 sequence states monitor fault states timeout states vx1 = 0 vp1 = 1 vp1 = 0 (vp1 + vp2) = 0 (vp1 + vp2 + vp3) = 0 (vp1 + vp2) = 0 vp2 = 1 vp3 = 1 vp2 = 0 vx1 = 1 vp3 = 0 vp2 = 0 vp1 = 0 vx1 = 1 vx1 = 1 10ms 20ms en2v5 f i g u re 20. s a mp le a p plic at i o n flow d i ag r a m table 7. pdo outputs for ea ch state pdo o u t p u t s i d l e 1 i d l e 2 e n 3 v 3 e n 2 v 5 d i s 3 v 3 d i s 2 v 5 p w r g d f s e l 1 f s e l 2 pdo1 = 3v3on 0 0 1 1 0 1 1 1 1 pdo2 = 2v5on 0 0 0 1 1 0 1 1 1 pdo3 = fault 0 0 0 0 1 1 0 1 1
prelim inary technical data adm1068 rev. pr b | page 17 of 28 sequence detector the s e q u en c e det e c t o r b l o c k is us ed t o detec t w h en a st ep in a s e q u e n ce has b e en co m p le t e d . i t lo oks fo r o n e of t h e in p u ts t o t h e se to ch ang e st a t e, a nd i s mo st of te n u s e d a s t h e g a te on su c c e s s f u l p r o g r e ss t h rou g h a p o we r - u p or p o we r - dow n s e q u e n ce . a t i mer b l o c k is i n cl u d e d i n t h is de t e c t o r , w h ich c a n in s e r t dela ys in to a p o w e r - u p o r p o w e r - do wn s e q u en c e , if r e q u ir ed . t i m e r de l a ys can b e s e t f r o m 10 s t o 400 m s . f i gur e 21 is a b l o c k d i a g ram o f t h e s e q u e n ce de t e c t o r . 04734-032 supply fault detection logic input change or fault detection warnings force flow (unconditional jump) vp1 vx4 invert sequence detector select timer f i gure 21. s e q u ence d e te c t o r b l o c k d i agr a m the s e q u en c e det e c t o r can als o h e l p t o iden tif y m o ni t o r i n g fa u l ts. i n t h e s a m p le a p plic a t ion sh o w n in f i gu r e 20, t h e fs el1 a nd fs el2 s t a t es f i rs t iden t i f y whic h o f the vp1, vp2, o r vp3 p i n s h a s fa ul t e d , a n d th e n th e y ta k e th e a p p r o p ri a t e a c t i o n . moni tori n g fault de tector th e mon i tor i ng f a u l t de te c t or b l o c k i s u s e d to d e te c t a f a i l u r e o n a n in pu t. t h e log i ca l f u n c t i on im ple m en t i n g t h is is a w i de or ga te, w h ich ca n dete c t w h e n a n in pu t d e vi a t es f r o m i t s exp e c t e d condi t i o n . th e cle a r e st de m o n s t r a t ion o f t h e us e o f t h is b l o c k is i n t h e p w r g d s t a t e , w h er e t h e m o ni t o r b l o c k indic a t e s t h a t a fa i l ur e o n on e or m o r e o f t h e v p 1,vp2, o r vp3 in p u ts has o c c u r r e d . n o pro g r a m m a bl e d e l a y i s a v ai l a bl e i n t h i s bl o c k , b e c a u s e t h e t r ig ger i n g o f a fa u l t con d i t ion is li k e ly t o b e ca u s e d w h en a s u p p l y fal l s o u t o f t o lera n c e . i n this si t u a t ion, the us er w o u l d wa n t t o r e ac t as q u ick l y as p o ssib le. s o m e l a t e n c y o c c u rs w h e n mov i ng out of t h i s st ate, howe v e r , b e c a u s e it t a ke s a f i n i t e amou n t of t i me ( ~ 2 0 s ) f o r t h e st ate c o n f i g u r a t i o n to do wn lo ad f r o m eepro m in t o t h e s e . f i gur e 22 is a b l o c k di a g r a m o f t h e m o n i to r i n g f a u l t dete c t o r . 04734-033 supply fault detection logic input change or fault detection v p1 v x4 monitoring fault detector mask sense 1-bit fault detector fault warnings mask 1-bit fault detector fault mask sense 1-bit fault detector fault f i g u re 22. m o n i t o r i ng f a ul t detecto r bl ock dia g r a m timeou t d e tector t h e tim e o u t d e t e ct o r allo w s th e use r t o tra p a fa il ur e t o m a k e p r o p er p r og r e s s thr o ug h a p o wer - u p o r p o w e r - do wn s e q u en ce . i n t h e s a m p le a p plica t io n sh ow n in f i gur e 20, t h e t i me o u t n e xt - s t a t e tra n si ti o n is f r o m th e en 3v 3 a n d en 2v 5 s t a t e s . f o r th e en3v3 s t a t e , the sig n al 3v3o n is a s se r t ed u p o n e n tr y t o th i s st a t e ( o n t h e p d o 1 ou tp u t pin ) to t u r n on a 3 . 3 v su p p ly . this su p p ly r a i l is conn e c te d to t h e vp2 p i n, and t h e s e q u e n ce d e te c - t o r lo o k s f o r th e vp2 p i n t o g o a b o v e i t s uv thr e s h o l d , whic h is s e t in t h e su p p ly fa u l t dete c t o r (s fd) a t t a ch e d t o t h a t p i n. the p o w e r - u p s e q u ence p r og r e s s es w h e n t h is cha n g e is det e c t e d . i f , h o w e v e r , t h e s u p p ly fa i l s (p erha ps d u e t o a sh o r t ci r c ui t o v e r loa d i n g th i s s u p p l y), th en th e tim e o u t b l oc k tra p s th e p r o b lem . i n th i s e x a m p l e , i f th e 3. 3 v s u p p l y fa ils wi th in 10 m s , th en th e s e m o v e s t o th e d i s3v 3 s t a t e a n d t u rn s o f f th i s s u p p l y b y b r in g i n g p d o1 lo w . i t als o in dica t e s t h a t a f a u l t has o c c u r r ed b y takin g p d o3 hig h . t i m e o u t de l a ys o f f r o m 100 s t o 400 m s can b e p r og ra mm e d . fault reporting the ad m1068 has a f a u l t l a t c h f o r r e co r d in g fa u l ts. t w o r e g i s t ers a r e s e t aside fo r t h is p u r p os e . a sin g le b i t is as sig n e d to e a ch i n p u t o f t h e de vic e , a nd a f a u l t on t h a t in pu t s e ts t h e r e le van t b i t. th e co n t e n ts o f t h e fa u l t r e g i st er can b e r e ad o u t ove r t h e sm bu s to de te r m i n e w h i c h i n put ( s ) f a u l te d. t h e f a u l t r e gi s t e r ca n be en a b l e d/ d i sa b l ed i n ea ch s t a t e . th i s e n s u r e s th a t o n l y r e al fa u l ts a r e ca p t ur e d and n o t, f o r exa m p l e , un der v ol ta ge t r i p s w h e n t h e se is exe c u t in g a p o w e r - do w n s e q u en c e .
adm1068 prelim inary technical data rev. pr b | page 18 of 28 appli c ations dia gram 04734-068 3.3v out vh pdo8 pdo7 signal_valid pdo6 power_good pdo2 pdo1 pdo5 pdo4 pdo3 en out dc-dc1 in 3.3v out 3v out 5v out 12v out en out dc-dc2 in 1.25v out en out dc-dc3 in en out ldo in 1.25v out 0.9v out 12v in 5v in 3v in 5v out vp1 3v out vp2 3.3v out vp3 1.25v out vx1 1.2v out vx2 0.9v out vx3 reset_l vx4 10 f vccp 10 f vddcap gnd adm1068 f i g u re 23. a p pl ic at i o ns d i ag r a m
preliminary technical data adm1068 rev. prb | page 19 of 28 communicating with the adm1068 configuration downlo ad at power-up the configuration of the adm1068 (uv/ov thresholds, glitch filter timeouts, pdo configurations, and so on) is dictated by the contents of ram. the ram is comprised of digital latches that are local to each of the functions on the device. the latches are double-buffered and have two identical latches, latch a and latch b. therefore, when an update to a function occurs, the contents of latch a are updated first, and then the contents of latch b are updated with identical data. the advantages of this architecture are explained in detail in this section. the latches are volatile memory and lose their contents at power-down. therefore, the configuration in the ram must be restored at power-up by downloading the contents of the eeprom (nonvolatile memory) to the local latches. this download occurs in steps, as follows: 1. with no power applied to the device, the pdos are all high impedance. 2. when 1 v appears on any of the inputs connected to the vdd arbitrator (vh or vpn), the pdos are all weakly pulled to gnd with a 20 k? impedance. 3. when the supply rises above the undervoltage lockout of the device (uvlo is 2.5 v), the eeprom starts to download to the ram. 4. the eeprom downloads its contents to all latch as. 5. once the contents of the eeprom are completely downloaded to the latch as, the device controller signals all latch as to download to all latch bs simultaneously, completing the configuration download. 6. at 0.5 ms after the configuration download completes, the first state definition is downloaded from eeprom into the se. note that any attempt to communicate with the device prior to the completion of the download causes the adm1068 to issue a no acknowledge (nack). updating the configuration after power-up, with all the configuration settings loaded from eeprom into the ram registers, the user might need to alter the configuration of functions on the adm1068, such as chang- ing the uv or ov limit of an sfd, changing the fault output of an sfd, or adjusting the rise time delay of one of the pdos. the adm1068 provides several options that allow the user to update the configuration over the smbus interface. the following options are controlled in the updcfg register: 1. update the configuration in real time. the user writes to ram across the smbus and the configuration is updated immediately. 2. update the latch as without updating the latch bs. with this method, the configuration of the adm1068 remains unchanged and continues to operate in the original setup until the instruction is given to update the latch bs. 3. change eeprom register contents without changing the ram contents, and then download the revised eeprom contents to the ram registers. again, with this method, the configuration of the adm1068 remains unchanged and continues to operate in the original setup until the instruction is given to update the ram. the instruction to download from the eeprom in option 3 is also a useful way to restore the original eeprom contents, if revisions to the configuration are unsatisfactory. for example, if the user needs to alter an ov threshold, this can be done by updating the ram register as described in option 1. however, if the user is not satisfied with the change and wants to revert to the original programmed value, then the device controller can issue a command to download the eeprom contents to the ram again, as described in option 3, restoring the adm1068 to its original configuration. the topology of the adm1068 makes this type of operation possible. the local, volatile registers (ram) are all double- buffered latches. setting bit 0 of the updcfg register to 1 leaves the double-buffered latches open at all times. if bit 0 is set to 0, then, when a ram write occurs across the smbus, only the first side of the double-buffered latch is written to. the user must then write a 1 to bit 1 of the updcfg register. this generates a pulse to update all the second latches at once. eeprom writes occur in a similar way. the final bit in this register can enable or disable eeprom page erasure. if this bit is set high, the contents of an eeprom page can all be set to 1. if low, then the contents of a page cannot be erased, even if the command code for page erasure is programmed across the smbus. the bitmap for the updcfg register is shown in the an-698 application note. a flow chart for download at power-up and subsequent configuration updates is shown in figure 24.
adm1068 prelim inary technical data rev. pr b | page 20 of 28 04734-035 power-up (v cc > 2.5v) eeprom e e p r o m l d d a t a r a m l d u p d smbus device controller latch a latch b function (ov threshold on vp1) f i g u re 24. conf ig ur at io n u p da te flow d i ag r a m updating the sequencing engine s e qu e n c i ng e n g i n e ( s e ) f u nc t i o n s are no t up d a t e d i n t h e s a me wa y as r e gu la r c o nf igura t io n la tc h e s. th e s e has i t s o w n de di ca te d 512 -b y t e eepro m fo r sto r in g st a t e d e f i ni t i o n s, p r o v idin g 63 individ u al s t a t es wi t h a 64 -b i t w o r d eac h (on e sta t e is r e s e r v e d ). a t p o w e r - u p , t h e f i rs t s t a t e is lo ade d f r o m t h e s e eep r o m in t o t h e e n g i n e i t s e lf. w h en t h e condi t i o n s o f t h is s t a t e a r e m e t, t h e n e xt st a t e is lo ade d f r o m eepr o m in t o t h e e n g i n e , a n d s o o n . t h e l o a d i n g o f e a c h n e w s t a t e t a k e s a p p r o x i - ma te l y 10 s. t o a l te r a st a t e, t h e re qu ire d change s m u st b e m a de dire c t ly to eep r o m. ram f o r ea c h s t a t e d o e s n o t e x i s t . t h e r e l eva n t al t e ra tion s m u st be made t o t h e 64-b i t w o r d , whic h is then u p lo aded dir e c t l y t o eep r o m. internal registers the ad m1068 co n t a i n s a la rg e n u m b er o f da ta r e g i s t ers. th e p r in ci p a l r e g i st e r s a r e t h e addr es s p o i n t e r r e g i s t er a nd t h e co nf igura t io n r e g i st ers. ad dress pointer r e gister this r e g i s t er con t a i n s t h e addr es s t h a t s e le c t s on e o f t h e o t h e r i n te r n a l re g i s t e r s . w h e n w r i t i n g to t h e a d m 1 0 6 8 , t h e f i rst b y te o f da t a is al wa ys a r e g i s t er addr es s, which is wr i t t e n t o t h e addr es s p o in ter r e g i s t er . c o nfigur ation r e gis t ers th e s e r e g i sters p r o v ide co n t r o l a nd co nf igur a t i o n fo r va r i o u s o p era t in g p a ram e t e rs o f th e ad m1068. eeprom the ad m1068 has tw o 512-b y te ce l l s o f n o n v ol a t ile , e l ec tr ical l y e r a s abl e , pro g r a m m a bl e re a d - o n l y me mor y ( e e p rom ) , f r om reg i st er a d dr ess e s 0xf800 t o 0xfb ff . th e eepr o m is us ed f o r p e r m a n en t s t o r a g e o f da t a tha t is n o t los t w h en th e ad m1068 is p o w e r e d do w n . on e ee pro m cel l co n t a i n s t h e co nf igur a t io n da t a o f t h e de vi ce; t h e o t h e r con t a i n s t h e s t a t e def i ni t i on s fo r th e s e . al t h o u g h r e f e r r ed t o as r e ad-o nl y m e mo r y , th e eepro m can b e wr i t t e n t o as w e l l as r e ad f r om v i a t h e s e r i a l b u s i n e x a c tl y th e sa m e wa y a s th e o t h e r r e gi s t er s. the ma jo r dif f e r en ces b e tw e e n t h e eep ro m and o t h e r r e g i s t ers a r e ? a n eep r o m lo ca ti o n m u s t b e b l a n k be f o r e i t ca n be wr i t t e n t o . i f i t c o n t a i n s da ta , i t m u s t f i rs t be eras ed . ? w r it i n g t o e e p r o m i s s l ow e r t h a n w r it i n g t o r a m . ? w r i t in g t o the e e p r o m sh o u ld be r e s t r i c t e d , b e ca us e i t has a limi ted wr i t e/c y c l e lif e o f typ i cal l y 10,000 wr i t e o p era t io ns d u e to t h e us ual eepr o m w e a r -o ut me ch an i s ms . the f i rs t eep ro m is s p li t in t o 16 (0 t o 15) p a g e s o f 32 b y t e s eac h . p a g e s 0 t o 6, s t a r tin g a t a d dr es s 0xf800, h o ld th e co nf igura t io n da ta f o r the a p p l ica t ion s o n t h e ad m1068 (th e s f ds, pd os, and s o o n ). t h es e eepro m addr e s s e s a r e t h e s a me as t h e r a m r e g i s t er addres s e s, p r ef ixe d b y f8. p a g e 7 is r e s e r v ed . p a g e s 8 t o 15 a r e f o r cus t o m er us e . da t a can be downlo ade d f r o m eep r o m t o r a m in on e o f t h e fol l o w ing w a y s : ? a t p o w e r - u p , w h en p a g e s 0 t o 6 a r e do wnlo ade d . ? by s e t t in g bi t 0 o f t h e u d o w nld r e g i st er (0xd8), w h ich p e r f o r m s a us er do wn lo ad o f p a ges 0 t o 6. serial bus interface the ad m1068 is co n t r o l l ed via th e s e r i al sys t em ma na g e m e n t b u s (s mb us). th e ad m1068 is co nnec t e d t o this b u s as a sla v e de vice, u n der t h e co n t r o l o f a m a ster d e vice. i t t a k e s a p p r o x i- ma te l y 1 m s a f t e r p o w e r - u p f o r th e ad m1068 t o do wnlo ad f r o m i t s eep r o m. th er ef o r e , acces s t o the ad m1068 is r e - s t r i c t e d un t i l t h e do wnlo ad is c o m p let e d . identifying the adm1068 on the smbus the ad m1060 has a 7-b i t s e r i a l b u s s l a v e addres s. the device is p o w e r e d u p wi t h a def a u l t s e r i a l b u s addr ess. t h e f i ve m s bs o f th e addr es s a r e s e t t o 01101; th e tw o ls bs a r e det e r m in ed b y t h e lo g i ca l st a t e s o f pin s a1 an d a0. this a l lo ws t h e co nne c t io n o f f o ur ad m1068s t o o n e s m b u s.
prelim inary technical data adm1068 rev. pr b | page 21 of 28 t h e devi ce al so h a s sev e r al i d en ti f i ca ti o n r e gi s t er s (r ea d - o n l y ), whic h can b e r e ad acr o s s the s m b u s. t a b l e 8 lis t s th e s e r e g i st e r s w i th th e i r v a l u e s a n d fun c t i o n s . table 8. i d entification regi s t er va lues a n d f u nct i ons name addres s value functio n manid 0xf4 0x41 manufacturer id for analog devices revid 0xf5 0x00 silicon rev i sion mark1 0xf6 0x00 s/w brand mark2 0xf7 0x00 s/w brand general smb u s timing f i gur e 25, f i gur e 26, a nd f i gur e 27 a r e timin g dia g ram s f o r g e n e ral r e ad and wr i t e o p er a t ion s usin g t h e s m bus. th e s m bu s sp e c if ic a t ion de f i n e s sp e c if ic con d i t io ns fo r dif f er en t ty p e s o f r e ad an d wr i t e o p era t io ns, w h i c h a r e dis c us s e d in t h e w r i t e o p era t io n s an d re a d o p era t io ns s e c t io n s . the g e n e ral s m bus p r o t o c ol o p era t es as fol l o w s: 1. the mas t er ini t i a t e s da t a t r an sfer b y es t a b l is hing a s t a r t co ndi t i on, def i ne d as a hig h -to - lo w t r a n si t i o n on t h e s e r i a l da t a -li n e sd a, w h i l e t h e s e r i al clo c k-li n e s c l r e ma in s h i gh . t h is in d i ca t e s tha t a da t a s t r e a m f o llo w s. all s l a v e p e r i pherals co nn e c te d t o t h e s e r i al b u s r e s p on d t o t h e st a r t co n d i ti o n a n d sh i f t in th e n e xt 8 b i ts, co n s i s ti n g o f a 7- b i t sla v e ad dr ess (ms b f i rst) pl us a r/ w bi t . t h i s bi t d e t e r - m i n e s th e d i r e ct i o n o f th e da t a t r a n sf e r , th a t i s , wh e t h e r da ta is wr i t t e n to o r r e ad f r o m th e sla v e de vice ( 0 = wr i t e , 1 = r e ad). the p e r i ph eral w h os e addr es s c o r r es p o n d s t o t h e t r an smi t - te d a ddr ess r e sp o n ds b y p u l l in g t h e d a t a li ne lo w d u r i n g th e lo w pe ri od be f o r e th e n i n t h c l oc k p u lse , kn o w n a s t h e ac kn o w le dg e b i t, a nd h o ldin g i t lo w d u r i n g th e hig h p e r i o d o f this c l o c k p u ls e . al l o t h e r de vice s o n the b u s r e ma in idle while th e s e le c t e d de vice wa i t s f o r da ta t o be r e ad f r o m o r wr i t t e n to i t . i f th e r/ w b i t is a 0, t h e mas t er wr i t es t o t h e sla v e de vi ce. i f t h e r/ w b i t is a 1, t h e mas t er r e ads f r o m t h e s l a v e de vi ce . 2. da t a i s sen t o v e r th e se ri al b u s in seq u en c e s o f n i n e c l oc k pu l s e s , e i g h t bit s of d a t a f o l l owe d by an a c k n ow l e d g e bit f r o m th e sla v e devi ce . d a ta tra n si ti o n s o n th e da ta li n e m u s t oc cu r d u rin g th e l o w pe riod o f th e c l oc k s i gn al a n d re m a i n s t abl e du r i ng t h e h i g h p e r i o d , b e c a u s e a l o w - to - h i gh tra n si ti o n wh e n th e c l oc k i s h i gh mi gh t be i n t e r p r e t e d as a s t o p sig n al . i f t h e o p er a t ion is a wr i t e o p er a t io n, t h e f i rs t da t a b y t e a f t e r t h e s l a v e addr es s is a co mmand b y t e . this te l l s t h e sla v e de vic e w h a t to exp e c t n e xt. i t mig h t b e a n inst r u c t io n te l l in g t h e sla v e de vice t o exp e c t a b l o c k wr i t e , o r i t mig h t sim p l y b e a r e g i s t er addr es s t h a t te l l s th e s l a v e w h er e sub s e q uen t da t a is to b e wr i t t e n. b e ca us e da t a ca n f l o w in o n ly o n e dir e c t io n, a s def i ne d b y t h e r/ w bit , s e ndin g a co m m a nd to a sl a v e de vice d u r i n g a r e ad o p era t ion is n o t p o ssi b le . b e fo r e a r e ad o p er a t ion, i t m i g h t b e ne c e ss ar y to p e r f or m a w r i t e op e r a t i o n to tel l t h e s l a v e w h a t s o r t o f r e ad o p era t io n t o exp e c t an d/o r t h e addr es s f r o m whic h da t a is t o b e r e ad . 3. w h en al l da ta b y t e s ha v e been read o r wr i t t e n, st o p co ndi - t i o n s a r e es t a b l i s h e d . i n wr i t e mo de , t h e mast er p u l l s t h e d a t a li ne hig h d u r i n g t h e 10t h clo c k p u ls e t o ass e r t a st o p co n d i ti o n . i n r e a d m o de , th e ma s t e r de v i ce r e le a s e s th e s d a li ne d u r i ng t h e lo w p e r i o d b e fo r e t h e n i n t h clo c k p u ls e , b u t t h e sl a v e de vice do es n o t p u l l i t lo w . this is kn o w n a s n o a c kn o w led g e . th e m a s t e r t h e n ta k e s th e da ta lin e lo w d u r i n g th e lo w p e r i o d bef o r e the t e n t h c l o c k p u ls e , t h e n hig h d u r i ng t h e ten t h clo c k p u ls e t o ass e r t a st o p co ndi t i on. 04734-036 19 9 1 19 1 9 start by master ack. by slave ack. by slave ack. by slave ack. by slave frame 2 command code frame 1 slave address frame n data byte frame 3 data byte scl sda r/w stop by master scl (continued) sda (continued) d7 a0 a1 1 0 0 1 0 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 f i g u re 25. gen e r a l sm bus w r ite tim i n g d i ag r a m
adm1068 prelim inary technical data rev. pr b | page 22 of 28 9 04734-037 19 9 1 19 1 start by master ack. by slave ack. by master ack. by master no ack. frame 2 data byte frame 1 slave address frame n data byte frame 3 data byte scl sda r/w stop by master scl (continued) sda (continued) d7 a0 a1 1 0 0 1 0 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 f i g u r e 2 6 . g e ne r a l s m b u s re a d t i mi ng di a g r a m 04734-038 scl sda ps s p t su; s t o t hd ; s t a t su ; s t a t su ; d a t t hd; da t t hd ; s t a t hi g h t bu f t lo w t r t f f i gure 27. s e ri al bu s t i ming d i agr a m smbus protocols for ram and eeprom the ad m1068 co n t a i n s v o l a til e r e g i s t ers (ram) a nd n o n v ola - t i le r e g i s t ers (eep r o m). u s er r a m o c c u p i es addr es s lo c a t i o n s f r o m 0x00 t o 0xd f ; eep r o m o c c u p i es addr ess e s f r o m 0xf800 t o 0xfb ff . d a t a can b e wr i t te n to and r e ad f r o m b o t h r a m a nd eeprom as sin g le da t a b y tes. d a t a can b e wr i t te n o n ly to un p r o g r a mm e d eepr o m lo ca t i o n s. t o wr i t e ne w d a t a t o a p r og ra mme d lo c a - t i o n , i t m u s t f i rst b e er as e d . eep r o m eras ur e cann ot b e don e a t th e b y te lev e l . th e eepr o m is a r ra n g ed as 32 p a g e s o f 32 b y t e s e a ch, an d an e n t i r e p a ge m u st b e eras e d . p a g e eras ur e is ena b le d b y s e t t i n g bi t 2 i n t h e up d c fg r e g i s t er (a ddr es s 0x90) t o 1. i f this b i t is n o t s e t, p a g e er as ur e ca nn ot o c c u r , ev en if the co mmand b y te (0xfe) is p r ogra mmed acr o s s th e s m b u s. write oper ations the s m bus sp e c if ica t ion def i n e s s e v e ra l p r o t o c ols fo r dif f e r en t t y p e s of re a d a n d w r ite op e r a t i o ns . t h e f o l l ow i n g abbr e v i a t i o n s are u s e d i n t h e d i ag r a ms : s s t a r t p s t o p r r e a d w w r i t e a a c kno w l e d g e a no acknowledge the ad m1068 us es th e f o l l o w in g s m b u s wr i t e p r o t o c ols. send byte i n a s e n d b y te op era t ion, t h e mas t er de vice s e nds a sin g le c o mma nd b y te to a sl a v e d e v i c e , a s fol l ow s : 1. the mas t er de v i ce as s e r t s a s t a r t co n d i t ion o n sd a. 2. the mas t er s e nds t h e 7 - b i t sla v e addr es s fol l o w e d b y t h e wr i t e b i t (lo w ). 3. the addr es s e d sla v e de vic e as s e r t s a c k o n s d a. 4. the ma ster s e nds a co mm a nd co de. 5. the s l a v e as s e r t s a c k on s d a. 6. the ma st er ass e r t s a st o p con d i t io n o n s d a an d t h e tra n sa cti o n en ds. i n t h e ad m106 8, th e s e nd b y t e p r o t o c ol is us ed f o r tw o pu r p o s e s : ? t o wr i t e a r e g i s t er addr es s t o r a m fo r a s u bs e q uen t sin g le b y t e r e ad f r o m t h e s a me ad dr ess , o r a b l o c k r e ad o r wr i t e s t a r tin g a t tha t addr es s, as sh own in f i gur e 28. 04734-039 24 13 slave address register address (0x00 to 0xdf) sw a a 5 6 p f i gure 28. s e tting a r a m a ddr ess for s u bsequent read
prelim inary technical data adm1068 rev. pr b | page 23 of 28 5 6 p ? t o e r a s e a p a ge of e e p rom me mor y . e e p rom me mor y ca n b e wr i t te n to o n ly if i t is un p r o g r a mm e d . b e fo r e w r i t i n g to o n e o r more e e p rom me mor y l o c a t i ons t h a t a r e alr e ad y p r og ra mme d , t h e p a g e o r p a g e s co n t a i nin g th ose loca ti o n s m u s t f i r s t be e r ased . eep r o m m e m o r y i s eras e d b y wr i t ing a co mmand b y t e . the ma ster s e nds a co mm a nd co de t h a t tel l s t h e sla v e de vice t o eras e t h e p a ge . th e ad m1068 co mma nd co de f o r a p a g e eras ur e is 0xfe (1111 11 10). n o t e tha t , f o r a p a g e eras ur e t o t a k e place , t h e p a g e addr es s has t o b e g i v e n i n t h e p r e v i o u s wr i t e w o rd t r a n s a c t io n (s e e t h e w r i t e by te/w o r d s e c t i o n). a l s o , bi t 2 i n t h e upd c f g r e g i ster (a ddr es s 0x90) m u s t be s e t t o 1. 04734-040 24 13 slave address command byte (0xfe) sw a a f i gur e 2 9 . eep r o m p a g e er a s ur e a s s o on as t h e ad m1068 r e ceiv es th e command b y t e , p a g e eras ur e b e g i n s . the mas t er de v i ce can s e n d a sto p co mman d as s o o n as i t s e n d s t h e co mmand b y te. p a ge eras ur e ta k e s a p p r o x ima t e l y 20 m s . i f th e ad m 1068 is access e d b e fo r e erasur e is co m p let e , i t r e sp on ds wi t h a n o ack n o w le dge (n a c k). write byte/word i n a wr i t e b y t e / w o r d o p era t io n, t h e mas t er de vi ce s e n d s a c o mma nd b y te and one or t w o d a t a b y te s to t h e sl a v e d e v i c e , a s fol l o w s: 1. the mas t er de v i ce as s e r t s a s t a r t co n d i t ion o n sd a. 2. the mas t er s e nds t h e 7 - b i t sla v e addr es s fol l o w e d b y t h e wr i t e b i t (lo w ). 3. the addr es s e d sla v e de vic e as s e r t s a c k o n s d a. 4. the ma ster s e nds a co mm a nd co de. 5. the sl a v e ass e r t s a c k on s d a. 6. the ma ster s e nds a da t a b y te. 7. the sl a v e ass e r t s a c k on s d a. 8. the ma ster s e nds a da t a b y te (or ass e r t s a sto p co ndi t i on a t t h is p o in t). 9. the sl a v e ass e r t s a c k on s d a. 10. the mas t er ass e r t s a s t o p con d i t io n o n s d a t o e nd t h e tra n sa cti o n . i n t h e ad m106 8, t h e wr i t e b y te /w o r d p r o t o c ol is us e d fo r t h r e e pu r p o s e s : ? t o wr i t e a sin g l e b y t e o f da t a t o ram. i n this c a s e , the co mman d b y t e is th e r a m addr es s f r o m 0x00 t o 0xd f a n d th e o n l y da ta b y t e i s th e a c t u al da ta , as sh o w n i n f i gur e 30. 04734-041 slave address ram address (0x00 to 0xdf) s w a data ap a 24 13 5 7 6 8 f i g u re 30. sing le b y te writ e t o r a m ? t o s e t u p a 2-b y t e eepro m a d dr ess fo r a subs e q uen t r e a d , wr i t e, b l o c k r e a d , b l o c k wr i t e, o r p a ge eras e. i n t h is cas e , t h e c o m m a n d by t e i s t h e h i g h by t e of t h e e e p r o m a d d r e s s f r om 0 x f 8 to 0 x f b . the on ly d a t a b y te i s t h e l o w b y te of t h e eepro m a ddr ess, as sh o w n in f i gur e 31. 04734- 042 slave address eeprom address high byte (0xf8 to 0xfb) sw a eeprom address low byte (0x00 to 0xff) ap a 24 13 5 7 6 8 f i g u re 31. s e t t i ng a n e e p r o m addr es s n o t e , f o r p a g e eras ur e , tha t bec a us e a p a ge co nsis ts o f 32 b y t e s, o n l y t h e t h r e e ms bs o f t h e addr es s lo w b y t e a r e im p o r t an t. the lo w e r f i v e b i ts of t h e eep r o m addr es s lo w b y te sp e c if y t h e addr ess e s w i t h i n a p a ge an d a r e ig n o r e d d u r i n g a n eras e o p era t ion. ? t o wr i t e a sin g l e b y t e o f da t a t o eep r o m. i n t h is cas e , th e c o m m a n d by t e i s t h e h i g h by t e of t h e e e p r o m a d d r e s s f r om 0 x f 8 to 0 x f b . the f i rst d a t a b y te i s t h e l o w b y te of t h e eepro m addr e s s, a nd t h e s e cond d a t a b y te is t h e ac t u a l da ta , as sh o w n in f i gur e 32. 04734- 043 slave address eeprom address high byte (0xf8 to 0xfb) sw a eeprom address low byte (0x00 to 0xff) ap a 24 13 5 7 a 9 data 8 6 1 0 f i g u re 32. sing le b y te writ e t o e e p r o m block w r ite i n a b l o c k wr i t e o p era t ion, t h e mas t er de vice w r i t es a b l o c k o f da t a t o a s l a v e de v i ce . th e s t a r t addr es s fo r a b l o c k wr i t e m u s t ha v e been s e t p r evio u s l y . i n t h e ad m1068, a s e nd b y t e o p er a - t i o n s e ts a r a m addr ess, an d a wr i t e b y t e /w o r d o p era t ion s e ts a n eep r o m addr es s, as f o llo w s : 1. the mas t er de v i ce as s e r t s a s t a r t co n d i t ion o n sd a. 2. the mas t er s e nds t h e 7 - b i t sla v e addr es s fol l o w e d b y t h e wr i t e b i t (lo w ). 3. the addr es s e d sla v e de vic e as s e r t s a c k o n s d a. 4. the ma ster s e nds a co mm a nd co de t h a t tel l s t h e sla v e de vice t o exp e c t a b l o c k wr i t e . th e ad m1068 c o mman d co de f o r a b l o c k wr i t e is 0xfc ( 1111 1100).
adm1068 prelim inary technical data rev. pr b | page 24 of 28 5. the sl a v e ass e r t s a c k on s d a. 6. the mas t er s e nds a da t a b y t e t h a t te l l s t h e s l a v e de vice h o w ma n y d a t a b y t e s a r e b e i n g s e n t . the s m bus sp e c if ica t ion a l lo ws a maxim u m o f 32 d a t a b y t e s in a b l o c k wr i t e. 7. the sl a v e ass e r t s a c k on s d a. 8. the ma ster s e nds n da t a b y tes. 9. th e sl a v e a s s e r t s a c k on sd a af te r e a ch d a t a b y te. 10. the mas t er ass e r t s a s t o p con d i t io n o n s d a t o e nd t h e tra n sa cti o n . 04734 - 044 slave address sw a 2 command 0xfc (block write) 4 13 a 5 byte count 6 a 7 a 9 1 0 a p a data 1 8 data n data 2 f i g u re 33. bl ock w r ite to e e p r o m or r a m u n li k e s o m e ee p r o m de vices tha t limi t b l o c k wr i t es t o wi thin a p a g e b o u nda r y , t h er e is n o li mi t a t i on o n t h e s t a r t addr es s w h en p e r f o r min g a b l o c k wr i t e t o eepro m, excep t ? ther e m u s t b e a t le as t n lo c a t i on s f r o m t h e s t a r t addr es s t o t h e hig h es t eepr o m addr es s ( 0 xfbff), t o a v o i d wr i t in g t o in v a lid a ddr ess e s. ? i f th e addr es s e s cr os s a p a g e bounda r y , bo th p a g e s m u s t be eras e d b e fo r e p r o g ra mmin g . n o t e tha t t h e ad m1068 f e a t ures a c l o c k ext e nd f u n c tion f o r wr i t es t o eep ro m. p r og ra mmin g a n ee p r o m b y t e ta k e s a p p r o x ima t e l y 250 s, whic h w o u l d limi t t h e s m b u s c l o c k f o r re p e a t e d or bl o c k w r ite op e r a t i o ns . t h e a d m 1 0 6 8 pu l l s s c l lo w a n d ext e n d s t h e clo c k p u ls e w h en i t c a nn o t accep t an y more d a t a . read oper ations the ad m1068 us es th e f o l l o w in g s m b u s r e ad p r o t o c ols. recei v e byte i n a r e ce i v e b y te o p era t ion, t h e mas t er de vice re cei v es a si n g le b y t e f r o m a sl a v e de vic e , as fol l o w s: 1. the mas t er de v i ce as s e r t s a s t a r t co n d i t ion o n sd a. 2. the mas t er s e nds t h e 7 - b i t sla v e addr es s fol l o w e d b y t h e re a d bit ( h i g h ) . 3. the ad dr ess e d sla v e de vic e ass e r t s a c k o n s d a. 4. the mas t er r e ce i v es a da t a b y te . 5. the mas t er ass e r t s n o ack n o w le dg e o n s d a . 6. the mas t er ass e r t s a s t o p con d i t io n o n s d a, and t h e tra n sa cti o n en ds. i n t h e ad m106 8, th e r e cei v e b y t e p r o t o c ol is us ed t o r e ad a s i ng l e by te of d a t a f r om a r a m or e e p rom l o c a t i on w h o s e addr ess has p r e v io usly b e en s e t b y a s e nd b y te o r wr i t e b y te/w o r d op er a t io n, a s sh o w n in f i gur e 34. 04734-045 23 14 5 slave address s r data p a 6 a f i g u re 34. sing le b y te r e ad f r om e e p r o m or r a m block r e ad i n a b l o c k r e a d o p era t ion, t h e mast er d e vice re ads a b l o c k o f d a t a f r o m a sl a v e de vic e . t h e st a r t addr ess fo r a b l o c k r e ad m u st ha v e been s e t p r evio u s l y . i n t h e ad m1068, this is do ne b y a s e nd b y te op er a t io n to s e t a r a m addr ess, o r a wr i t e b y te/w o r d o p era t ion t o s e t a n eep r o m addr es s. th e b l o c k r e ad o p era t io n i t s e lf co n s is ts o f a s e n d b y te o p era t io n tha t s e n d s a b l o c k r e ad c o mmand to t h e sl a ve, i m me d i a t ely fol l owe d b y a re p e a t e d s t ar t a nd a r e a d o p er a t io n t h a t r e ads o u t m u l t i p le da t a b y tes, as fol l o w s: 1. the mas t er de v i ce as s e r t s a s t a r t co n d i t ion o n sd a. 2. the mas t er s e nds t h e 7 - b i t sla v e addr es s fol l o w e d b y t h e wr i t e b i t (lo w ). 3. the addr es s e d sla v e de vic e as s e r t s a c k o n s d a. 4. the ma ster s e nds a co mm a nd co de t h a t tel l s t h e sla v e de vice t o exp e c t a b l o c k r e ad . th e ad m1068 c o mman d co de f o r a b l o c k r e ad is 0xfd (1111 1101). 5. the s l a v e as s e r t s a c k on s d a. 6. the mas t er ass e r t s a r e p e a t s t a r t co n d i t ion o n sd a. 7. the mas t er s e nds t h e 7 - b i t sla v e addr es s fol l o w e d b y t h e re a d bit ( h i g h ) . 8. the s l a v e as s e r t s a c k on s d a. 9. the ad m1068 s e n d s a b y t e -coun t da ta b y t e tha t te l l s th e mas t er h o w man y da t a b y t e s t o exp e c t . th e ad m1068 al wa ys r e t u r n s 3 2 da ta b y t e s (0x 20), whic h is t h e maxim u m a l lo w e d b y t h e smbus 1.1 sp e c if ica t ion. 10. the mas t er ass e r t s a c k o n s d a. 11. the mas t er r e ce i v es 32 da t a b y tes. 12. the mas t er ass e r t s a c k o n s d a a f t e r e a ch da t a b y t e . 13. the mas t er ass e r t s a s t o p con d i t io n o n s d a t o e nd t h e tra n sa cti o n .
prelim inary technical data adm1068 rev. pr b | page 25 of 28 04734 - 046 slave address sw a 2 command 0xfd (block read) 4 13 a 5 s 6 slave address 7 byte count 91 0 1 2 11 a ra 8 data 1 data 32 13 a 14 p a f i g u re 35. bl ock r e ad f r om e e p r o m o r r a m error corr ecti on the ad m1068 p r o v ides the o p t i o n o f is s u in g a p e c (p ac k e t e r ror c o r r e c t i on ) b y te af te r a w r ite to r a m , a w r ite to e e pr o m , a b l o c k wr i t e t o r a m/eeprom, o r a b l o c k r e ad f r o m r a m / eep r o m. this ena b les t h e us er t o v e r i f y t h a t t h e da t a r e cei v e d b y o r s e n t f r o m th e ad m1068 is co r r ec t. th e pec b y t e is a n opt i ona l b y te s e n t af te r t h a t l a st d a t a b y t e h a s b e e n w r i tte n to or r e ad f r o m th e ad m1068. the p r o t o c ol is as f o l l o w s: 1. the ad m1068 is s u es a p e c b y t e t o the mas t er . the mast er ch e c ks t h e pec b y t e an d issues a n o t h e r b l o c k r e ad , if t h e pe c b y te is i n c o r r e c t. 2. a no a c k n ow l e dge ( n a c k ) i s ge ne r a te d af te r t h e pe c b y te t o si gn al th e en d o f th e r e ad . n o t e tha t t h e pec b y t e is calc u l a t ed usin g c r c-8. th e f r am e ch e c k s e q u e n c e (fcs) co nfo r m s t o cr c-8 b y t h e p o l y n o mial c ( x ) = x 8 + x 2 + x 1 + 1 s e e t h e s m bus 1.1 sp e c if ic a t ion fo r det a i l s. an exa m ple o f a b l o c k r e ad wi t h t h e o p t i o n al pec b y t e is s h own in f i gur e 36. 04734 - 047 slave address sw a 2 command 0xfd (block read) 4 13 a 5 s 6 slave address 7 byte count 91 0 1 2 11 a ra 8 data 1 data 32 a 13 pec 14 a 15 p a f i g u re 36. bl ock r e ad f r om e e p r o m o r r a m wit h pe c
adm1068 prelim inary technical data rev. pr b | page 26 of 28 outline dimensions compliant to jedec standards ms-026-bba view a top view (pins down) 8 1 32 25 24 17 16 9 0.80 bsc lead pitch 9.00 bsc sq 7.00 bsc s q 1.60 max 0.75 0.60 0.45 0.45 0.37 0.30 pin 1 0.20 0.09 1.45 1.40 1.35 0.10 max coplanarity v i e w a r o t a t e d 9 0 c c w seating plane 7 3.5 0 0.15 0.05 f i g u re 37. 3 2 -l ead l o w p r of i l e q u ad f l at p a ckag e [l qf p ] (st - 32-2) di me nsio ns sho w n i n mi ll im e t e r s ordering guide model temperature r a nge description package option ADM1068ACP ?40c to +85c 32-lead lqfp st-32-2 ADM1068ACP- r eel ?40c to +85c 32-lead lqfp st-32-2 ADM1068ACP- r eel7 ?40c to +85c 32-lead lqfp st-32-2 eval-ad m1068 lqeb adm1068 evaluation kit
preliminary technical data adm1068 rev. prb | page 27 of 28 notes
adm1068 prelim inary technical data rev. pr b | page 28 of 28 notes ? 2004 analo g de vices, inc. all rights reserve d . tra d em arks and registered tra d ema r ks are the prop erty of their respective owners . pr04734C0C11/0 4 (pr b )

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